SC is the International Conference for
 High Performnance Computing, Networking, Storage and Analysis

SCHEDULE: NOV 13-19, 2010

CPM in CMPs: Coordinated Power Management in Chip-Multiprocessors

SESSION: On-Chip Networks and Power Management

EVENT TYPE: Paper

TIME: 11:30AM - 12:00PM

SESSION CHAIR: Keren Bergman

AUTHOR(S):Asit K. Mishra, Shekhar Srikantaiah, Mahmut Kandemir, Chita R. Das

ROOM:391-392

ABSTRACT:
Multiple clock domain architectures have recently been proposed to alleviate the power problem in CMPs by having different frequency/voltage values assigned to each domain based on workload requirements. However, accurate allocation of power to these voltage/frequency islands based on time varying workload characteristics as well as controlling the power consumption at the provisioned power level is quite non-trivial. Toward this end, we propose a two-tier feedback-based control theoretic solution. Our first-tier consists of a global power manager that allocates power targets to individual islands based on the workload dynamics. The power consumptions of these islands are in turn controlled by a second-tier, consisting of local controllers that regulate island power using dynamic voltage and frequency scaling in response to workload requirements.

Chair/Author Details:

Keren Bergman (Chair) - Columbia University

Asit K. Mishra - Pennsylvania State University

Shekhar Srikantaiah - Pennsylvania State University

Mahmut Kandemir - Pennsylvania State University

Chita R. Das - Pennsylvania State University

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The full paper can be found in the ACM Digital Library and IEEE Computer Society

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