SC is the International Conference for
 High Performnance Computing, Networking, Storage and Analysis

SCHEDULE: NOV 13-19, 2010

Simple but Effective Heterogeneous Main Memory with On-Chip Memory Controller Support

SESSION: Storage Technologies


TIME: 2:30PM - 3:00PM

SESSION CHAIR: Ethan L. Miller

AUTHOR(S):Xiangyu Dong, Yuan Xie, Naveen Muralimanohar, Norman P. Jouppi


System-in-package (SiP) and 3D integration are promising technologies to bring more memory onto a microprocessor package to mitigate the ``memory wall'' problem. In this paper, instead of using them to build caches, we study a heterogenous main memory using both on- and off-package memories providing both fast and high-bandwidth on-package accesses and expandable and low-cost commodity off-package memory capacity. We introduce another layer of address translation coupled with an on-chip memory controller that can dynamically migrate data between off-package and off-package memory either in hardware or with operating system assistance depending on the migration granularity. Our experimental results demonstrate that such design can achieve the average effectiveness of 83% of the ideal case where all memory can be placed in high-speed on-package memory for our simulated benchmarks.

Chair/Author Details:

Ethan L. Miller (Chair) - University of California, Santa Cruz

Xiangyu Dong - Pennsylvania State University

Yuan Xie - Pennsylvania State University

Naveen Muralimanohar - Hewlett-Packard

Norman P. Jouppi - Hewlett-Packard

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The full paper can be found in the ACM Digital Library and IEEE Computer Society

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