Verification, Validation and Uncertainty Analysis in High-Performance Computing
SESSION: Verification, Validation and Uncertainty Analysis in High-Performance Computing
EVENT TYPE: Workshop
TIME: 1:30PM - 5:00PM
Organizer(s):Laura L. Pullum, Robert M. Patton, Thomas E. Potok
ABSTRACT: High-performance computing applications (HPC) have historically advanced the frontier of software complexity, and next generation HPC environments will increase substantially further. The nature of HPC introduces verification, validation and uncertainty analysis (VV&U) challenges that are perhaps unique to the field. Many HPC applications are simulation-oriented which further exacerbates the difficulties by introducing additional validation requirements and possibilities for uncertainty in the results. Unfortunately, HPC application software VV&U do not have a strong tradition since most of the work related to this area has been heavily focused on tolerance to faults due to hardware failure. This workshop will provide a forum for evaluating, sharing, and creating ideas for validation, verification, and uncertainty analysis of HPC applications. For more information go to http://aser.ornl.gov/events/sc2010.