BEGIN:VCALENDAR
VERSION:2.0
X-WR-TIMEZONE:America/Chicago
PRODID:-//Apple Inc.//iCal 3.0//EN
CALSCALE:GREGORIAN
X-WR-CALNAME:Toward Exascale Computing with Heterogeneous Architectures
METHOD:PUBLISH
BEGIN:VTIMEZONE
TZID:America/Chicago
BEGIN:DAYLIGHT
TZOFFSETFROM:-0600
TZOFFSETTO:-0500
DTSTART:20070311T020000
RRULE:FREQ=YEARLY;BYMONTH=3;BYDAY=2SU
TZNAME:CDT
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BEGIN:STANDARD
TZOFFSETFROM:-0500
TZOFFSETTO:-0600
DTSTART:20071104T020000
RRULE:FREQ=YEARLY;BYMONTH=11;BYDAY=1SU
TZNAME:CST
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BEGIN:VEVENT
SEQUENCE:2
DTSTART;TZID=America/Chicago:20101117T133000
DESCRIPTION:ABSTRACT: Recent reports from DOE\, DARPA\, and NSF have identified multiple challenges on the road to Exascale High Performance Computing. These challenges include the unrelenting issues of performance\, scalability\, and productivity\, but they also include the relatively new priorities of energy-efficiency and resiliency. Not coincidentally\, recently announced HPC architectures\, such as RoadRunner\, Tianhe\, Tsubame\, Keeneland\, and Nebulae\, illustrate that scalable heterogeneous computer (SHC) systems can provide innovative solutions. More SHC systems are expected in the coming months. Early experiences on these systems have demonstrated performance benefits; however\, SHC systems have multiple challenges: low programmer productivity\, no portability\, lack of integrated tools and libraries\, and very sensitive performance stability. Taken together\, these issues will impede the adoption of these architectures by erecting a very high entry barrier to application teams and their scientific productivity. This panel will discuss the future of SHC architectures\, and how future changes might lower this barrier.
UID:pan129@sc10.supercomputing.org
SUMMARY:Toward Exascale Computing with Heterogeneous Architectures
DTEND;TZID=America/Chicago:20101117T150000
LOCATION:384-385
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